HD64F3644PV Datasheet, PDF (313/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Block Diagram
Figure 10.6 shows a block diagram of SCI3.
Section 10 Serial Communication Interface
SCK₃
External
clock
Baud rate generator
Clock
BRC
Transmit/receive
control circuit
Internal clock (φ/64, φ/16, φ/4, φ)
BRR
SMR
SCR3
SSR
TXD
TSR
TDR
RXD
RSR
RDR
Legend:
RSR: Receive shift register
RDR: Receive data register
TSR: Transmit shift register
TDR: Transmit data register
SMR: Serial mode register
SCR3: Serial control register 3
SSR: Serial status register
BRR: Bit rate register
BRC: Bit rate counter
Figure 10.6 SCI3 Block Diagram
Interrupt request
(TEI, TXI, RXI, ERI)
Rev. 6.00 Sep 12, 2006 page 291 of 526
REJ09B0326-0600