HD64F3644PV Datasheet, PDF (165/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 ROM
LOOPE:
MOV.W
MOV.B
MOV.B
MOV.B
MOV.B
MOV.W
BSET
NOP
NOP
NOP
NOP
SUBS
MOV.W
BNE
BCLR
MOV.B
MOV.B
#H'e5A,
R4L,
R4H,
#H'36,
R4L,
R5,
#1,
#1,
R4,
LOOPE
#1,
#H'50,
R4L,
R4
;
@TCSRW:8 ;
@TCW:8 ;
R4L
;
@TCSRW:8 ; Start watchdog timer
R4
; Set erase loop counter
@FLMCR:8 ; Set E bit
R4
;
R4
;
; Wait loop
@FLMCR:8 ; Clear E bit
R4L
;
@TCSRW:8 ; Stop watchdog timer
; Execute erase-verify
EVR: MOV.W #RAMSTR, R2
MOV.W #ERVADR, R3
ADD.W R3,
R2
MOV.W #START, R3
SUB.W R3,
R2
; Transfer destination start address (RAM)
;
; #RAMSTR + #ERVADR → R2
;
; Address of data area used in RAM
MOV.B
MOV.B
BSET
LOOPEV: DEC
BNE
EBRTST: CMP.B
BEQ
CMP.B
BMI
MOV.B
SUBX
BTST
BNE
BRA
EBR2EV: BTST
BNE
ADD01: INC
MOV.W
BRA
#H'00,
#H'b,
#3,
R4H
LOOPEV
#H'0C,
HANTEI
#H'08,
EBR2EV
R1L,
#H'08,
R1H,
ERSEVF
ADD01
R1L,
ERSEVF
R1L
@R2+,
EBRTST
R1L
; Used to test bit R1L in R0
R4H
; Set erase-verify loop counter
@FLMCR:8 ; Set EV bit
;
; Wait loop
R1L
; R1L = H'0C?
; If finished checking all R0 bits, branch to HANTEI
R1L
;
; If R1L ≥ 8, EBR1 test; if R1L < 8, EBR2 test
R1H
;
R1H
R0H
; R1L – 8 → R1H
; Test bit R1H in EBR1 (R0H)
; If bit R1H in EBR1 (R0H) is 1, branch to ERSEVF
; If bit R1H in EBR1 (R0H) is 0, branch to ADD01
R0L
; Test bit R1L in EBR2 (R0L)
; If bit R1L in EBR2 (R0L) is 1, branch to ERSEVF
; R1L + 1 → R1L
R3
; Dummy-increment R2
;
ERASE1: BRA ERASE
; Branch to ERASE via ERASE1
ERSEVF: MOV.W @R2+,
R3
; Start address of block to be erase-verified
Rev. 6.00 Sep 12, 2006 page 143 of 526
REJ09B0326-0600