HD64F3644PV Datasheet, PDF (169/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 ROM
Examples:
Sample calculations when executing a program in on-chip memory (RAM) at an operating
frequency of 6 MHz
a (φ) = ⁶ × 9 = 10.8 ≈ 10 = H'000A
5
b (φ) = ⁶ × 4 = 4.8 ≈ 5 = H'05
5
c (φ) = ⁶ × 2 = 2.4 ≈ 3 = H'03
5
d (φ) = ⁶ × 1953 = 2343.6 ≈ 2343 = H'0927
5
Table 6.12 Watchdog Timer Overflow Interval Settings (Set Value of #e for Operating
Frequencies)
Variable
e (φ)
fOSC = 16 MHz
φ = 8 MHz
H'9B
Oscillation Frequency
fOSC = 10 MHz fOSC = 8 MHz
Operating Frequency
φ = 5 MHz
φ = 4 MHz
H'DF
H'E5
fOSC = 2 MHz
φ = 1 MHz
H'F7
6.7.7 Prewrite-Verify Mode
Prewrite-verify mode is a verify mode used to all bits to equalize their threshold voltages before
erasure.
To program all bits, write H'00 in accordance with the prewrite algorithm shown in figure 6.15.
Use this procedure to set all data in the flash memory to H'00 after programming. After the
necessary programming time has elapsed, exit program mode (by clearing the P bit to 0) and select
prewrite-verify mode (leave the P, E, PV, and EV bits all cleared to 0). In prewrite-verify mode, a
prewrite-verify voltage is applied to the memory cells at the read address. If the flash memory is
read in this state, the data at the read address will be read. After selecting prewrite-verify mode,
wait at least 4 µs before reading.
Note: For a sample prewriting program, see the prewrite subroutine in the sample erasing
program.
Rev. 6.00 Sep 12, 2006 page 147 of 526
REJ09B0326-0600