HD64F3644PV Datasheet, PDF (354/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Serial Communication Interface
SCI3 operates as follows when transmitting data.
SCI3 monitors bit TDRE in SSR, and when it is cleared to 0, recognizes that data has been written
to TDR and transfers data from TDR to TSR. It then sets bit TDRE to 1 and starts transmitting. If
bit TIE in SCR3 is set to 1 at this time, a TXI request is made.
Serial data is transmitted from the TXD pin using the relevant data transfer format in table 10.14.
When the stop bit is sent, SCI3 checks bit TDRE. If bit TDRE is cleared to 0, SCI3 transfers data
from TDR to TSR, and when the stop bit has been sent, starts transmission of the next frame. If bit
TDRE is set to 1, bit TEND in SSR is set to 1, and the mark state, in which 1s are transmitted, is
established after the stop bit has been sent. If bit TEIE in SCR3 is set to 1 at this time, a TEI
request is made.
Figure 10.23 shows an example of the operation when transmitting using the multiprocessor
format.
Serial
data
Start
bit
Transmit
data
Stop Start
MPB bit bit
Transmit
data
Stop
MPB bit
1 0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1
1 frame
1 frame
Mark
state
1
TDRE
TEND
LSI
TXI request
operation
User
processing
TDRE
cleared to 0
Data written
to TDR
TXI request
TEI request
Figure 10.23 Example of Operation when Transmitting using Multiprocessor Format
(8-Bit Data, Multiprocessor Bit, 1 Stop Bit)
Multiprocessor Receiving: Figure 10.24 shows an example of a flowchart for multiprocessor data
reception. This procedure should be followed for multiprocessor data reception after initializing
SCI3.
Rev. 6.00 Sep 12, 2006 page 332 of 526
REJ09B0326-0600