HD64F3644PV Datasheet, PDF (272/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
Timer Control Register X (TCRX)
Bit
Initial value
Read/Write
7
IEDGA
0
R/W
6
IEDGB
0
R/W
5
IEDGC
0
R/W
4
IEDGD
0
R/W
3
BUFEA
0
R/W
2
BUFEB
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
TCRX is an 8-bit read/write register that selects the valid edges of the input capture signals,
enables buffering, and selects the FRC clock source.
TCRX is initialized to H'00 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
Bit 7Input Edge Select A (IEDGA): Bit 7 selects the rising or falling edge of the input capture
A input signal (FTIA).
Bit 7: IEDGA
0
1
Description
Falling edge of input capture A is captured
Rising edge of input capture A is captured
(initial value)
Bit 6Input Edge Select B (IEDGB): Bit 6 selects the rising or falling edge of the input capture
B input signal (FTIB).
Bit 6: IEDGB
0
1
Description
Falling edge of input capture B is captured
Rising edge of input capture B is captured
(initial value)
Bit 5Input Edge Select C (IEDGC): Bit 5 selects the rising or falling edge of the input capture
C input signal (FTIC).
Bit 5: IEDGC
0
1
Description
Falling edge of input capture C is captured
Rising edge of input capture C is captured
(initial value)
Rev. 6.00 Sep 12, 2006 page 250 of 526
REJ09B0326-0600