HD64F3644PV Datasheet, PDF (323/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Serial Communication Interface
Bit 6Receive Data Register Full (RDRF): Bit 6 indicates that received data is stored in RDR.
Bit 6: RDRF
Description
0
There is no receive data in RDR
(initial value)
Clearing conditions:
• After reading RDRF = 1, cleared by writing 0 to RDRF
• When RDR data is read by an instruction
1
There is receive data in RDR
Setting condition:
When reception ends normally and receive data is transferred from RSR to
RDR
Note:
If an error is detected in the receive data, or if the RE bit in SCR3 has been cleared to 0,
RDR and bit RDRF are not affected and retain their previous state.
Note that if data reception is completed while bit RDRF is still set to 1, an overrun error
(OER) will result and the receive data will be lost.
Bit 5Overrun Error (OER): Bit 5 indicates that an overrun error has occurred during
reception.
Bit 5: OER
Description
0
Reception in progress or completed^*1
(initial value)
Clearing condition:
After reading OER = 1, cleared by writing 0 to OER
1
An overrun error has occurred during reception^*2
Setting condition:
When reception is completed with RDRF set to 1
Notes: 1. When bit RE in SCR3 is cleared to 0, bit OER is not affected and retains its previous
state.
2. RDR retains the receive data it held before the overrun error occurred, and data
received after the error is lost. Reception cannot be continued with bit OER set to 1,
and in synchronous mode, transmission cannot be continued either.
Rev. 6.00 Sep 12, 2006 page 301 of 526
REJ09B0326-0600