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HD64F3644PV Datasheet, PDF (480/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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Appendix B Internal I/O Registers
SCSR1âSerial control/status register
H'FFA1
SCI1
Bit
7
6
5
4
3
2
1
0
â
SOL ORER â
â
â
MTRF STF
Initial value
1
0
0
1
1
1
0
0
Read/Write
â
R/W R/(W)* â
â
â
R
R/W
Start flag
0 Read
Write
1 Read
Write
Indicates that transfer is stopped
Invalid
Indicates transfer in progress
Starts a transfer operation
TAIL MARK transmit flag
0 Idle state and 8- or -16-bit data transfer in progress
1 TAIL MARK transmission in progress
Overrun error flag
0 [Clearing condition]
After reading 1, cleared by writing 0
1 [Setting condition]
Set if a clock pulse is input after transfer
is complete, when an external clock is used
Extended data bit
0 Read SO1 pin output level is low
Write SO1 pin output level changes to low
1 Read SO1 pin output level is high
Write SO1 pin output level changes to high
Note: * Only a write of 0 for flag clearing is possible.
Rev. 6.00 Sep 12, 2006 page 458 of 526
REJ09B0326-0600
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