HD64F3644PV Datasheet, PDF (279/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
FRC Count Timing: FRC is incremented by clock input. Bits CKS1 and CKS0 in TCRX can
select one of three internal clock sources (φ/2, φ/8, φ/32) or an external clock.
• Internal clock
Bits CKS1 and CKS0 in TCRX select one of three internal clock sources (φ/2, φ/8, φ/32)
created by dividing the system clock (φ). Figure 9.20 shows the increment timing.
φ
Internal
clock
FRC input
clock
FRC
N–1
N
N+1
Figure 9.20 Increment Timing with Internal Clock
• External clock
External clock input is selected when bits CKS1 and CKS0 are both set to 1 in TCRX. FRC
increments on the rising edge of the external clock. An external pulse width of at least 1.5
system clocks (φ) is necessary. Shorter pulses will not be counted correctly. Figure 9.21 shows
the timing.
φ
FTCI
(external clock
input pin)
FRC input
clock
FRC
N
N–1
Figure 9.21 Increment Timing with External Clock
Rev. 6.00 Sep 12, 2006 page 257 of 526
REJ09B0326-0600