HD64F3644PV Datasheet, PDF (151/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

6.7.3 Programming Flowchart and Sample Program
Flowchart for Programming One Byte
Section 6 ROM
Start
Set erase block register
(set bit for block to be programmed to 1)
Write data to flash memory
(flash memory latches write address
and data) ^*1
n=1
Enable watchdog timer ^*2
Select program mode
(P bit = 1 in FLMCR)
Wait (x) µs ^*4
Clear P bit
Disable watchdog timer
Select program-verify mode
(PV bit = 1 in FLMCR)
End of programming
Notes: 1. Write the data to be programmed using a byte
transfer instruction.
2. For the timer overflow interval, set the timer
counter value (TCW) to H'FE.
3. Read the memory data to be verified using a
byte transfer instruction.
4. Programming time x is successively
incremented to initial set value × 2^n–1 (n = 1 to
6). The initial value should therefore be set to
15.8 µs or less to make the total
programming time 1 ms or less.
5. t_vs1: 4 µs or more
N: 6 (set N so that total programming time
does not exceed 1 ms)
Wait (tvs1) µs ^*5
Verify ^*3
NG
(read memory)
OK
Clear PV bit
Clear PV bit
End of verify
Clear erase block register
(clear bit for programmed block to 0)
End (1-byte data programmed)
n ≥ N? ^*5
Yes
Programming error
No
n+1→n
Double the programming time
(x × 2 → x)
Figure 6.13 Programming Flowchart
Rev. 6.00 Sep 12, 2006 page 129 of 526
REJ09B0326-0600