HD64F3644PV Datasheet, PDF (498/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
PWCR—PWM control register
H'FFD0
14-bit PWM
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
—
—
—
—
—
— PWCR0
1
1
1
1
1
1
1
0
—
—
—
—
—
—
—
W
Clock select
0 The input clock is φ/2 (tφ * = 2/φ). The conversion period is 16,384/φ,
with a minimum modulation width of 1/φ.
1 The input clock is φ/4 (tφ * = 4/φ). The conversion period is 32,768/φ,
with a minimum modulation width of 2/φ.
Note: * tφ: Period of PWM input clock
PWDRU—PWM data register U
H'FFD1
14-bit PWM
Bit
7
—
Initial value
1
Read/Write
—
6
5
4
3
2
1
0
— PWDRU5 PWDRU4PWDRU3PWDRU2 PWDRU1PWDRU0
1
0
0
0
0
0
0
—
W
W
W
W
W
W
Upper 6 bits of data for generating PWM waveform
PWDRL—PWM data register L
H'FFD2
14-bit PWM
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
PWDRL7 PWDRL6 PWDRL5 PWDRL4 PWDRL3 PWDRL2 PWDRL1 PWDRL0
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
Lower 8 bits of data for generating PWM waveform
Rev. 6.00 Sep 12, 2006 page 476 of 526
REJ09B0326-0600