HD64F3644PV Datasheet, PDF (227/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Block Diagram
Figure 9.1 shows a block diagram of timer A.
Section 9 Timers
φ_W
1/4
PSW
φ_W /4
TMA
TMOW
φ _W/32
φ _W/16
φ _W/8
φ _W/4
φ/32
φ/16
φ/8
φ/4
φ _W/128
φ/8192, φ/4096, φ/2048,
φ/512, φ/256, φ/128,
φ/32, φ/8
TCA
φ
PSS
IRRTA
Legend:
TMA: Timer mode register A
TCA: Timer counter A
IRRTA: Timer A overflow interrupt request flag
PSW: Prescaler W
PSS: Prescaler S
Note: * Can be selected only when the prescaler W output (φ_W/128) is used as the TCA input clock.
Figure 9.1 Block Diagram of Timer A
Pin Configuration
Table 9.2 shows the timer A pin configuration.
Table 9.2 Pin Configuration
Name
Clock output
Abbr.
TMOW
I/O
Output
Function
Output of waveform generated by timer A output
circuit
Rev. 6.00 Sep 12, 2006 page 205 of 526
REJ09B0326-0600