MC68HC908GT16 Datasheet, PDF (99/412 Pages) Motorola, Inc – Microcontrollers

Analog-to-Digital Converter (ADC)
I/O Registers
Table 5-2. ADC Clock Divide Ratio
ADIV2 ADIV1
0
0
0
0
0
1
0
1
1
X⁽¹⁾
1. X = Don’t care
ADIV0
0
1
0
1
X⁽¹⁾
ADC Clock Rate
ADC input clock ÷ 1
ADC input clock ÷ 2
ADC input clock ÷ 4
ADC input clock ÷ 8
ADC input clock ÷ 16
ADICLK — ADC Input Clock Select Bit
ADICLK selects either the bus clock or the oscillator output clock
(CGMXCLK) as the input clock source to generate the internal ADC
clock. Reset selects CGMXCLK as the ADC clock source.
1 = Internal bus clock
0 = Oscillator outputclock (CGMXCLK)
The ADC requires a clock rate of approximately 1 MHz for correct
operation. If the selected clock source is not fast enough, the ADC will
generate incorrect conversions. See 23.16 ADC Characteristics.
f_ADIC =
f_CGMXCLK or bus frequency
ADIV[2:0]
≅ 1 MHz
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Analog-to-Digital Converter (ADC)
Technical Data
99