MC68HC908GT16 Datasheet, PDF (156/412 Pages) Motorola, Inc – Microcontrollers

Computer Operating Properly (COP) Module
9.4.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 9.5 COP
Control Register) clears the COP counter and clears bits 12 through 5
of the prescaler. Reading the COP control register returns the low byte
of the reset vector.
9.4.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096
CGMXCLK cycles after power-up.
9.4.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
9.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
9.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register. See Section 8. Configuration Register
(CONFIG).
9.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register. See Section 8. Configuration Register
(CONFIG).
Technical Data
156
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Computer Operating Properly (COP) Module
MOTOROLA