MC68HC908GT16 Datasheet, PDF (318/412 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
19.8.2 SIM Reset Status Register
This register contains six flags that show the source of the last reset
provided all previous reset status bits have been cleared. Clear the SIM
reset status register by reading it. A power-on reset sets the POR bit and
clears all other bits in the register.
Address: $FE01
Bit 7
6
5
4
3
2
1
Bit 0
Read: POR
PIN
COP ILOP ILAD MODRST LVI
0
Write:
Reset: 1
0
0
0
0
0
0
0
= Unimplemented
Figure 19-21. SIM Reset Status Register (SRSR)
POR — Power-On Reset Bit
1 = Last reset caused by POR circuit
0 = Read of SRSR
PIN — External Reset Bit
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
COP — Computer Operating Properly Reset Bit
1 = Last reset caused by COP counter
0 = POR or read of SRSR
ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
MODRST — Monitor Mode Entry Module Reset Bit
1 = Last reset caused by monitor mode entry when vector locations
$FFFE and $FFFF are $FF after POR while IRQ = V_DD
0 = POR or read of SRSR
Technical Data
318
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
System Integration Module (SIM)
MOTOROLA