MC68HC908GT16 Datasheet, PDF (274/412 Pages) Motorola, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI)
WAKE — Wakeup Condition Bit
This read/write bit determines which condition wakes up the ESCI: a
logic 1 (address mark) in the MSB position of a received character or
an idle condition on the RxD pin. Reset clears the WAKE bit.
1 = Address mark wakeup
0 = Idle line wakeup
ILTY — Idle Line Type Bit
This read/write bit determines when the ESCI starts counting logic 1s
as idle character bits. The counting begins either after the start bit or
after the stop bit. If the count begins after the start bit, then a string of
logic 1s preceding the stop bit may cause false recognition of an idle
character. Beginning the count after the stop bit avoids false idle
character recognition, but requires properly synchronized
transmissions. Reset clears the ILTY bit.
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
PEN — Parity Enable Bit
This read/write bit enables the ESCI parity function (see Table 18-5).
When enabled, the parity function inserts a parity bit in the MSB
position (see Table 18-3). Reset clears the PEN bit.
1 = Parity function enabled
0 = Parity function disabled
PTY — Parity Bit
This read/write bit determines whether the ESCI generates and
checks for odd parity or even parity (see Table 18-5). Reset clears the
PTY bit.
1 = Odd parity
0 = Even parity
NOTE: Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
Technical Data
274
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Enhanced Serial Communications Interface (ESCI) Module
MOTOROLA