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MC68HC908GT16 Datasheet, PDF (134/412 Pages) Motorola, Inc – Microcontrollers
Internal Clock Generator (ICG) Module
makes 32 corrections (128*τIBASE) to get from 15 percent to the
minimum error. The total time to the minimum error is:
τtot = abs[44N(τ1 – τ2)] + 128τIBASE
The equations for τ15, τ5, and τtot are dependent on the actual initial and
final clock periods τ1 and τ2, not the nominal. This means the variability
in the ICLK frequency due to process, temperature, and voltage must be
considered. Additionally, other process factors and noise can affect the
actual tolerances of the points at which the filter changes modes. This
means a worst case adjustment of up to 35 percent (ICLK clock period
tolerance plus 10 percent) must be added. This adjustment can be
reduced with trimming. Table 7-3 shows some typical values for settling
time.
Table 7-3. Typical Settling Time Examples
τ1
1/ (6.45 MHz)
1/ (25.8 MHz)
1/ (25.8 MHz)
1/ (307.2 kHz)
τ2
1/ (25.8 MHz)
1/ (6.45 MHz)
1/ (307.2 kHz)
1/ (25.8 MHz)
N
τ15
84 430 µs
21 107 µs
1
141 µs
84 11.9 ms
τ5
535 µs
212 µs
246 µs
12.0 ms
τtot
850 µs
525 µs
560 µs
12.3 ms
7.5.7 Trimming Frequency on the Internal Clock Generator
The unadjusted frequency of the low-frequency base clock (IBASE),
when the comparators in the frequency comparator indicate zero error,
will vary as much as ±25 percent due to process, temperature, and
voltage dependencies. These dependencies are in the voltage and
current references, the offset of the comparators, and the internal
capacitor.
The method of changing the unadjusted operating point is by changing
the size of the capacitor. This capacitor is designed with 639 equally
sized units. Of that number, 384 of these units are always connected.
The remaining 255 units are put in by adjusting the ICG trim factor
(TRIM). The default value for TRIM is $80, or 128 units, making the
default capacitor size 512. Each unit added or removed will adjust the
Technical Data
134
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Internal Clock Generator (ICG) Module
MOTOROLA