MC68HC908GT16 Datasheet, PDF (278/412 Pages) Motorola, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI)
Address: $0015
Bit 7
6
5
4
3
2
1
Bit 0
Read: R8
T8
R
Write:
R
ORIE NEIE FEIE PEIE
Reset: U
0
0
0
0
0
0
0
= Unimplemented
R = Reserved U = Unaffected
Figure 18-11. ESCI Control Register 3 (SCC3)
R8 — Received Bit 8
When the ESCI is receiving 9-bit characters, R8 is the read-only ninth
bit (bit 8) of the received character. R8 is received at the same time
that the SCDR receives the other 8 bits.
When the ESCI is receiving 8-bit characters, R8 is a copy of the eighth
bit (bit 7). Reset has no effect on the R8 bit.
T8 — Transmitted Bit 8
When the ESCI is transmitting 9-bit characters, T8 is the read/write
ninth bit (bit 8) of the transmitted character. T8 is loaded into the
transmit shift register at the same time that the SCDR is loaded into
the transmit shift register. Reset clears the T8 bit.
ORIE — Receiver Overrun Interrupt Enable Bit
This read/write bit enables ESCI error CPU interrupt requests
generated by the receiver overrun bit, OR. Reset clears ORIE.
1 = ESCI error CPU interrupt requests from OR bit enabled
0 = ESCI error CPU interrupt requests from OR bit disabled
NEIE — Receiver Noise Error Interrupt Enable Bit
This read/write bit enables ESCI error CPU interrupt requests
generated by the noise error bit, NE. Reset clears NEIE.
1 = ESCI error CPU interrupt requests from NE bit enabled
0 = ESCI error CPU interrupt requests from NE bit disabled
Technical Data
278
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Enhanced Serial Communications Interface (ESCI) Module
MOTOROLA