MC68HC908GT16 Datasheet, PDF (148/412 Pages) Motorola, Inc – Microcontrollers

Configuration Register (CONFIG)
NOTE:
On a FLASH device, the options except LVI5OR3 are one-time writable
by the user after each reset. The LVI5OR3 bit is one-time writable by the
user only after each POR (power-on reset). The CONFIG registers are
not in the FLASH memory but are special registers containing one-time
writable latches after each reset. Upon a reset, the CONFIG registers
default to predetermined settings as shown in Figure 8-1 and
Figure 8-2.
Address: $001E
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
Write:
0
EXT- EXT- EXT-
XTALEN SLOW CLKEN
0
OSCEN-
INSTOP
R
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
Figure 8-1. Configuration Register 2 (CONFIG2)
Address: $001F
Bit 7
6
5
4
3
2
1
Read:
COPRS LVISTOP LVIRSTD LVIPWRD LVI5OR3 SSREC
Write:
STOP
Reset: 0
0
0
0 See Note 0
0
Note: LVI5OR3 bit is only reset via POR (power-on reset)
Figure 8-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
EXTXTALEN — External Crystal Enable Bit
EXTXTALEN enables the external oscillator circuits to be configured
for a crystal configuration where the PTE4/OSC1 and PTE3/OSC2
pins are the connections for an external crystal.
Clearing the EXTXTALEN bit (default setting) allows the PTE3/OSC2
pin to function as a general-purpose I/O pin. Refer to Table 8-1 for
configuration options for the external source. See Section 7. Internal
Clock Generator (ICG) Module for a more detailed description of the
external clock operation.
EXTXTALEN, when set, also configures the clock monitor to expect
an external clock source in the valid range of crystals (30 kHz to
100 kHz or 1 MHz to 8 MHz). When EXTXTALEN is clear, the clock
Technical Data
148
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Configuration Register (CONFIG)
MOTOROLA