MC68HC908GT16 Datasheet, PDF (267/412 Pages) Motorola, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI) Module
Functional Description
Fast Data Tolerance
Figure 18-8 shows how much a fast received character can be
misaligned without causing a noise error or a framing error. The fast
stop bit ends at RT10 instead of RT16 but is still there for the stop bit
data samples at RT8, RT9, and RT10.
RECEIVER
RT CLOCK
STOP
IDLE OR NEXT CHARACTER
DATA
SAMPLES
Figure 18-8. Fast Data
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in Figure 18-8, the receiver
counts 154 RT cycles at the point when the count of the transmitting
device is 10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the
transmitter count of a fast 8-bit character with no errors:is
1----5---4-1----5–_{---4-1----6---0-- × 100 = 3.90%.}
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in Figure 18-8, the receiver
counts 170 RT cycles at the point when the count of the transmitting
device is 11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the
transmitter count of a fast 9-bit character with no errors is:
1----7---0-1----7–_{---0-1----7---6-- × 100 = 3.53%.}
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Enhanced Serial Communications Interface (ESCI) Module
Technical Data
267