MC68HC908GT16 Datasheet, PDF (129/412 Pages) Motorola, Inc – Microcontrollers

Internal Clock Generator (ICG) Module
Usage Notes
7.5.4.1 Digitally Controlled Oscillator
The digitally controlled oscillator (DCO) is an inaccurate oscillator which
generates the internal clock (ICLK), whose clock period is dependent on
the digital loop filter outputs (DSTG[7:0] and DDIV[3:0]). Because of the
digital nature of the DCO, the clock period of ICLK will change in
quantized steps. This will create a clock period difference or quantization
error (Q-ERR) from one cycle to the next. Over several cycles or for
longer periods, this error is divided out until it reaches a minimum error
of 0.202 percent to 0.368 percent. The dependence of this error on the
DDIV[3:0] value and the number of cycles the error is measured over is
shown in Table 7-2.
Table 7-2. Quantization Error in ICLK
DDIV[3:0]
%0000 (min)
%0000 (min)
%0000 (min)
%0001
%0001
%0001
%0010
%0010
%0010
%0011
%0011
%0100
%0100
%0101–%1001 (max)
ICLK Cycles
1
4
≥ 32
1
4
≥ 16
1
4
≥8
1
≥4
1
≥2
≥1
Bus Cycles
NA
1
≥8
NA
1
≥4
NA
1
≥2
NA
≥1
NA
≥1
≥1
τ_ICLK Q-ERR
6.45%–11.8%
1.61%–2.94%
0.202%–0.368%
3.23%–5.88%
0.806%–1.47%
0.202%–0.368%
1.61%–2.94%
0.403%–0.735%
0.202%–0.368%
0.806%–1.47%
0.202%–0.368%
0.403%–0.735%
0.202%–0.368%
0.202%–0.368%
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Internal Clock Generator (ICG) Module
Technical Data
129