MC68HC908GT16 Datasheet, PDF (121/412 Pages) Motorola, Inc – Microcontrollers

Internal Clock Generator (ICG) Module
Functional Description
7.4.4.2 Internal Clock Activity Detector
The internal clock activity detector, shown in Figure 7-5, looks for at
least one falling edge on the low-frequency base clock (IBASE) every
time the external reference (EREF) is low. Since EREF is less than half
the frequency of IBASE, this should occur every time. If it does not occur
two consecutive times, the internal clock inactivity indicator (IOFF) is set.
IOFF will be cleared the next time there is a falling edge of IBASE while
EREF is low.
The internal clock stable bit (ICGS) is also generated in the internal clock
activity detector. ICGS is set when the internal clock generator’s filter
stable signal (FICGS) indicates that IBASE is within about 5 percent of
the target 307.2 kHz ± 25 percent for two consecutive measurements.
ICGS is cleared when FICGS is clear, the internal clock generator is
turned off or is in stop mode (ICGEN is clear), or when IOFF is set.
CMON
EREF
IBASE
DLF MEASURE
OUTPUT CLOCK
ICGEN
FICGS
R
D
DFFRS
CK Q
S
CK Q
1/4
R
R
D
Q
DFFRR
CK
R
R
D
Q
DFFRR
CK
R
IOFF
ICGS
NAME
NAME
CONFIG2 REGISTER BIT
TOP LEVEL SIGNAL
NAME
NAME
REGISTER BIT
MODULE SIGNAL
Figure 7-5. Internal Clock Activity Detector
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Internal Clock Generator (ICG) Module
Technical Data
121