MC68HC908GT16 Datasheet, PDF (178/412 Pages) Motorola, Inc – Microcontrollers

FLASH Memory
11.3 Functional Description
The FLASH memory is an array of 15,872 bytes (7,680 bytes on
MC68HC908GT8) with an additional 36 bytes of user vectors, one byte
of block protection and two bytes of ICG user trim storage. An erased bit
reads as logic 1 and a programmed bit reads as a logic 0. Memory in the
FLASH array is organized into two rows per page basis. The page size
is 64 bytes per page and the row size is 32 bytes per row. Hence the
minimum erase page size is 64 bytes and the minimum program row size
is 32 bytes. Program and erase operation operations are facilitated
through control bits in FLASH control register (FLCR). Details for these
operations appear later in this section.
The address ranges for the user memory and vectors are:
• $C000–$FDFF; user memory ($E000–$FDFF on
MC68HC908GT8)
• $FE08; FLASH control register
• $FF7E; FLASH block protect register
• $FF80; ICG user trim register (ICGTR5)
• $FF81; ICG user trim register (ICGTR3)
• $FFDC–$FFFF; these locations are reserved for user-defined
interrupt and reset vectors
NOTE:
Programming tools are available from Motorola. Contact your local
Motorola representative for more information.
A security feature prevents viewing of the FLASH contents.⁽¹⁾
Technical Data
178
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
FLASH Memory
MOTOROLA