MC68HC908GT16 Datasheet, PDF (270/412 Pages) Motorola, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI)
18.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
18.6.1 Wait Mode
The ESCI module remains active in wait mode. Any enabled CPU
interrupt request from the ESCI module can bring the MCU out of wait
mode.
If ESCI module functions are not required during wait mode, reduce
power consumption by disabling the module before executing the WAIT
instruction.
18.6.2 Stop Mode
The ESCI module is inactive in stop mode. The STOP instruction does
not affect ESCI register states. ESCI module operation resumes after
the MCU exits stop mode.
Because the internal clock is inactive during stop mode, entering stop
mode during an ESCI transmission or reception results in invalid data.
18.7 ESCI During Break Module Interrupts
The BCFE bit in the break flag control register (SBFCR) enables
software to clear status bits during the break state. See Section 6.
Break Module (BRK).
To allow software to clear status bits during a break interrupt, write a
logic 1 to the BCFE bit. If a status bit is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), software can read and write
I/O registers during the break state without affecting status bits. Some
status bits have a two-step read/write clearing procedure. If software
Technical Data
270
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Enhanced Serial Communications Interface (ESCI) Module
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