MC68HC908GT16 Datasheet, PDF (217/412 Pages) Motorola, Inc – Microcontrollers

Monitor ROM (MON)
Functional Description
15.4.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
START
BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5
NEXT
START
BIT 6 BIT 7 STOP BIT
BIT
Figure 15-5. Monitor Data Format
15.4.3 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
MISSING STOP BIT
2-STOP BIT DELAY BEFORE ZERO ECHO
15.4.4 Baud Rate
01234567
01234567
Figure 15-6. Break Transaction
The communication baud rate is controlled by the crystal frequency and
the state of the PTC3 pin (when IRQ is set to V_TST) upon entry into
monitor mode. When PTC3 is high, the divide by ratio is 1024. If the
PTC3 pin is at logic 0 upon entry into monitor mode, the divide by ratio
is 512.
If monitor mode was entered with V_DD on IRQ, then the divide by ratio is
set at 1024, regardless of PTC3. If monitor mode was entered with V_SS
on IRQ, then the ICG generates 2.4576 MHz. These latter two conditions
for monitor mode entry require that the reset vector is blank.
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Monitor ROM (MON)
Technical Data
217