MC68HC908GT16 Datasheet, PDF (152/412 Pages) Motorola, Inc – Microcontrollers

Configuration Register (CONFIG)
If the system clock source selected is the internal oscillator or the
external crystal and the OSCENINSTOP configuration bit is not set,
the oscillator will be disabled during stop mode. The short stop
recovery does not provide enough time for oscillator stabilization and
thus the SSREC bit should not be set.
When using the LVI during normal operation but disabling during stop
mode, the LVI will have an enable time of t_en. The system stabilization
time for power-on reset and long stop recovery (both 4096 CGMXCLK
cycles) gives a delay longer than the LVI enable time for these startup
scenarios. There is no period where the MCU is not protected from a
low-power condition. However, when using the short stop recovery
configuration option, the 32-CGMXCLK delay must be greater than
the LVI’s turn on time to avoid a period in startup where the LVI is not
protecting the MCU.
STOP — STOP Instruction Enable Bit
STOP enables the STOP instruction.
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
COPD — COP Disable Bit
COPD disables the COP module. See Section 9. Computer
Operating Properly (COP) Module.
1 = COP module disabled
0 = COP module enabled
Technical Data
152
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Configuration Register (CONFIG)
MOTOROLA