MC68HC908GT16 Datasheet, PDF (378/412 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module (TIM)
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port D, and pin PTDx/TCHx is available as a general-purpose I/O
pin. Table 22-3 shows how ELSxB and ELSxA work. Reset clears the
ELSxB and ELSxA bits.
Table 22-3. Mode, Edge, and Level Selection
MSxB:MSxA ELSxB:ELSxA
Mode
Configuration
X0
00
Pin under port control;
initial output level high
Output preset
X1
00
Pin under port control;
initial output level low
00
01
Capture on rising edge only
00
10
Input capture ^{Capture on falling edge only}
00
11
Capture on rising or
falling edge
01
01
Toggle output on compare
Output
01
10
compare or Clear output on compare
PWM
01
11
Set output on compare
1X
01
Buffered
Toggle output on compare
1X
10
output
compare or
Clear output on compare
1X
11
buffered PWM _{Set output on compare}
NOTE: Before enabling a TIM channel register for input capture operation, make
sure that the PTD/TCHx pin is stable for at least two bus clocks.
Technical Data
378
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Timer Interface Module (TIM)
MOTOROLA