MC68HC908GT16 Datasheet, PDF (345/412 Pages) Motorola, Inc – Microcontrollers

Serial Peripheral Interface Module (SPI)
I/O Registers
20.14 I/O Registers
Three registers control and monitor SPI operation:
• SPI control register (SPCR)
• SPI status and control register (SPSCR)
• SPI data register (SPDR)
20.14.1 SPI Control Register
The SPI control register:
• Enables SPI module interrupt requests
• Configures the SPI module as master or slave
• Selects serial clock polarity and phase
• Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
• Enables the SPI module
Address: $0010
Bit 7
6
5
4
3
2
1
Read:
SPRIE
Write:
DMAS
SPMSTR CPOL
CPHA SPWOM SPE
Reset: 0
0
1
0
1
0
0
= Unimplemented
Figure 20-13. SPI Control Register (SPCR)
Bit 0
SPTIE
0
SPRIE — SPI Receiver Interrupt Enable Bit
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Serial Peripheral Interface Module (SPI)
Technical Data
345