MC68HC908GT16 Datasheet, PDF (360/412 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module (TIM)
22.5 Functional Description
Figure 22-1 shows the structure of the TIM. The central component of
the TIM is the 16-bit TIM counter that can operate as a free-running
counter or a modulo up-counter. The TIM counter provides the timing
reference for the input capture and output compare functions. The TIM
counter modulo registers, TMODH:TMODL, control the modulo value of
the TIM counter. Software can read the TIM counter value at any time
without affecting the counting sequence.
The two TIM channels (per timer) are programmable independently as
input capture or output compare channels. If a channel is configured as
input capture, then an internal pullup device may be enabled for that
channel. See 16.6.3 Port D Input Pullup Enable Register.
Figure 22-2 summarizes the timer registers.
NOTE:
References to either timer 1 or timer 2 may be made in the following text
by omitting the timer number. For example, TSC may generically refer to
both T1SC and T2SC.
Addr. Register Name
Bit 7
6
5
4
3
2
Timer 1 Status and Control ^{Read: TOF}
TOIE TSTOP
0
0
PS2
$0020
Register (T1SC) Write: 0
TRST
See page 371. _{Reset: 0}
0
1
0
0
0
Timer 1 Counter ^{Read: Bit 15}
14
13
12
11
10
$0021 Register High (T1CNTH) Write:
See page 374. _{Reset: 0}
0
0
0
0
0
Timer 1 Counter ^{Read: Bit 7}
6
5
4
3
2
$0022 Register Low (T1CNTL) Write:
See page 374. _{Reset: 0}
0
0
0
0
0
Timer 1 Counter Modulo ^Read: _{Bit 15}
14
13
12
11
10
$0023 Register High (T1MODH) Write:
See page 375. _{Reset: 1}
1
1
1
1
1
= Unimplemented
Figure 22-2. TIM I/O Register Summary (Sheet 1 of 3)
1
Bit 0
PS1
PS0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
9
Bit 8
1
1
Technical Data
360
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Timer Interface Module (TIM)
MOTOROLA