MC68HC908GT16 Datasheet, PDF (302/412 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
19.4.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 CGMXCLK
cycles to allow resetting of external peripherals. The internal reset
signal IRST continues to be asserted for an additional 32 cycles. See
Figure 19-5. An internal reset can be caused by an illegal address,
illegal opcode, COP timeout, LVI, or POR. See Figure 19-6.
NOTE:
For LVI or POR resets, the SIM cycles through 4096 + 32 CGMXCLK
cycles during which the SIM forces the RST pin low. The internal reset
signal then follows the sequence from the falling edge of RST shown in
Figure 19-5.
IRST
RST
CGMXCLK
IAB
RST PULLED LOW BY MCU
32 CYCLES
32 CYCLES
VECTOR HIGH
Figure 19-5. Internal Reset Timing
The COP reset is asynchronous to the bus clock.
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
COPRST
LVI
POR
MODRST
INTERNAL RESET
Figure 19-6. Sources of Internal Reset
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
Technical Data
302
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
System Integration Module (SIM)
MOTOROLA