MC68HC908GT16 Datasheet, PDF (68/412 Pages) Motorola, Inc – Microcontrollers

Low-Power Modes
3.14.2 Stop Mode
The timebase module may remain active after execution of the STOP
instruction if the oscillator has been enabled to operate during stop mode
through the OSCENINSTOP bit in the CONFIG2 register. The timebase
module can be used in this mode to generate a periodic wakeup from
stop mode.
If the oscillator has not been enabled to operate in stop mode, the
timebase module will not be active during stop mode. In stop mode, the
timebase register is not accessible by the CPU.
If the timebase functions are not required during stop mode, reduce the
power consumption by stopping the timebase before enabling the STOP
instruction.
3.15 Exiting Wait Mode
These events restart the CPU clock and load the program counter with
the reset vector or with an interrupt vector:
• External reset — A logic 0 on the RST pin resets the MCU and
loads the program counter with the contents of locations $FFFE
and $FFFF.
• External interrupt — A high-to-low transition on an external
interrupt pin (IRQ pin) loads the program counter with the contents
of locations: $FFFA and $FFFB; IRQ pin.
• Break interrupt — A break interrupt loads the program counter
with the contents of $FFFC and $FFFD.
• Computer operating properly module (COP) reset — A timeout of
the COP counter resets the MCU and loads the program counter
with the contents of $FFFE and $FFFF.
• Low-voltage inhibit module (LVI) reset — A power supply voltage
below the V_TRIPF voltage resets the MCU and loads the program
counter with the contents of locations $FFFE and $FFFF.
• Internal Clock Generator module (ICG) interrupt — A CPU
interrupt request from the ICG loads the program counter with the
contents of $FFF8 and $FFF9.
Technical Data
68
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Low-Power Modes
MOTOROLA