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MC68HC908GT16 Datasheet, PDF (325/412 Pages) Motorola, Inc – Microcontrollers
Serial Peripheral Interface Module (SPI)
Functional Description
The following paragraphs describe the operation of the SPI module.
20.5.1 Master Mode
The SPI operates in master mode when the SPI master bit, SPMSTR, is
set.
NOTE:
Configure the SPI modules as master or slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave
SPI before disabling the master SPI. See 20.14.1 SPI Control Register.
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the transmit
data register. If the shift register is empty, the byte immediately transfers
to the shift register, setting the SPI transmitter empty bit, SPTE. The byte
begins shifting out on the MOSI pin under the control of the serial clock.
See Figure 20-3.
MASTER MCU
SHIFT REGISTER
BAUD RATE
GENERATOR
MISO
MOSI
SPSCK
SS
SLAVE MCU
MISO
MOSI
SPSCK
SHIFT REGISTER
SS
VDD
Figure 20-3. Full-Duplex Master-Slave Connections
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See 20.14.2 SPI Status and Control
Register.) Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
As the byte shifts out on the MOSI pin of the master, another byte shifts
in from the slave on the master’s MISO pin. The transmission ends when
the receiver full bit, SPRF, becomes set. At the same time that SPRF
becomes set, the byte from the slave transfers to the receive data
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Serial Peripheral Interface Module (SPI)
Technical Data
325