MC68HC908GT16 Datasheet, PDF (138/412 Pages) Motorola, Inc – Microcontrollers

Internal Clock Generator (ICG) Module
7.7.4 Oscillator Enable In Stop (OSCENINSTOP)
Oscillator enable in stop (OSCENINSTOP), when set, will enable the
ICG to continue to generate clocks (either CGMXCLK, CGMOUT,
COPCLK, or TBMCLK) in stop mode. This function is used to keep the
timebase and COP running while the rest of the microcontroller stops.
The clock monitor and autoswitching functions remain operative.
When OSCENINSTOP is clear, all clock generation will cease and
CGMXCLK, CGMOUT, COPCLK, and TBMCLK will be forced low during
stop mode. The clock monitor and autoswitching functions become
inoperative.
The default state for this option is clear.
7.8 Input/Output (I/O) Registers
The ICG contains five registers, summarized in Figure 7-10. These
registers are:
1. ICG control register (ICGCR)
2. ICG multiplier register (ICGMR)
3. ICG trim register (ICGTR)
4. ICG DCO divider control register (ICGDVR)
5. ICG DCO stage control register (ICGDSR)
Several of the bits in these registers have interaction where the state of
one bit may force another bit to a particular state or prevent another bit
from being set or cleared. A summary of this interaction is shown in
Table 7-4.
Technical Data
138
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Internal Clock Generator (ICG) Module
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