MC68HC908GT16 Datasheet, PDF (179/412 Pages) Motorola, Inc – Microcontrollers

FLASH Memory
FLASH Control Register
11.4 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase
operations.
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
HVEN MASS ERASE PGM
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 11-1. FLASH Control Register (FLCR)
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for
program and erase operations in the array. HVEN can only be set if
either PGM = 1 or ERASE = 1 and the proper sequence for program
or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MASS — Mass Erase Control Bit
Setting this read/write bit configures the 16Kbyte FLASH array for
mass erase operation.
1 = MASS erase operation selected
0 = MASS erase operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = Erase operation selected
0 = Erase operation unselected
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
FLASH Memory
Technical Data
179