MC68HC908GT16 Datasheet, PDF (174/412 Pages) Motorola, Inc – Microcontrollers

Central Processor Unit (CPU)
Table 10-1. Instruction Set Summary (Sheet 7 of 8)
Source
Form
Operation
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STA opr,SP
STA opr,SP
STHX opr
STOP
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
STX opr,SP
STX opr,SP
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
SUB opr,SP
SUB opr,SP
Store A in M
Store H:X in M
Enable IRQ Pin; Stop Oscillator
Store X in M
Subtract
SWI
Software Interrupt
TAP
TAX
TPA
TST opr
TSTA
TSTX
TST opr,X
TST ,X
TST opr,SP
TSX
Transfer A to CCR
Transfer A to X
Transfer CCR to A
Test for Negative or Zero
Transfer SP to H:X
Description
Effect on
CCR
VH I NZC
M ← (A)
(M:M + 1) ← (H:X)
DIR
EXT
IX2
0 – –   – IX1
IX
SP1
SP2
0 – –   – DIR
I ← 0; Stop Oscillator
– – 0 – – – INH
M ← (X)
DIR
EXT
IX2
0 – –   – IX1
IX
SP1
SP2
A ← (A) – (M)
IMM
DIR
EXT

–
–



IX2
IX1
IX
SP1
SP2
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
SP ← (SP) – 1; I ← 1
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
CCR ← (A)
– – 1 – – – INH
      INH
X ← (A)
– – – – – – INH
A ← (CCR)
– – – – – – INH
(A) – $00 or (X) – $00 or (M) – $00
DIR
INH
0
–
–


–
INH
IX1
IX
SP1
H:X ← (SP) + 1
– – – – – – INH
B7 dd 3
C7 hh ll 4
D7 ee ff 4
E7 ff
3
F7
2
9EE7 ff
4
9ED7 ee ff 5
35 dd 4
8E
1
BF dd 3
CF hh ll 4
DF ee ff 4
EF ff
3
FF
2
9EEF ff
4
9EDF ee ff 5
A0 ii
2
B0 dd 3
C0 hh ll 4
D0 ee ff 4
E0 ff
3
F0
2
9EE0 ff
4
9ED0 ee ff 5
83
9
84
2
97
1
85
1
3D dd 3
4D
1
5D
1
6D ff
3
7D
2
9E6D ff
4
95
2
Technical Data
174
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Central Processor Unit (CPU)
MOTOROLA