MC68HC908GT16 Datasheet, PDF (54/412 Pages) Motorola, Inc – Microcontrollers

Memory Map
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Timer 2 Channel 0 ^Read: _{Bit 15}
14
$0031 Register High (T2CH0H) Write:
See page 380. _Reset:
13
12
11
10
Indeterminate after reset
9
Bit 8
Timer 2 Channel 0 ^Read: _{Bit 7}
6
$0032 Register Low (T2CH0L) Write:
See page 380. _Reset:
5
4
3
2
Indeterminate after reset
1
Bit 0
Timer 2 Channel 1 Status Read: CH1F
0
$0033
and Control Register
(T2SC1)
Write:
0
CH1IE
MS1A ELS1B ELS1A TOV1 CH1MAX
See page 376. Reset: 0
0
0
0
0
0
0
0
Timer 2 Channel 1 ^Read: _{Bit 15}
14
$0034 Register High (T2CH1H) Write:
See page 380. _Reset:
13
12
11
10
Indeterminate after reset
9
Bit 8
Timer 2 Channel 1 ^Read: _{Bit 7}
6
$0035 Register Low (T2CH1L) Write:
See page 380. _Reset:
5
4
3
2
Indeterminate after reset
1
Bit 0
$0036
ICG Control Register ^Read:
(ICGCR) Write:
See page 141. _Reset:
CMIE
0
CMF
CMON
0
0
0
ICGS
ECGS
CS ICGON
ECGON
0
1
0
0
0
ICG Multiplier Register ^Read:
$0037
(ICGMR) Write:
See page 143. _{Reset: 0}
N6
N5
N4
N3
N2
N1
N0
0
0
1
0
1
0
1
$0038
ICG Trim Register ^Read:
(ICGTR) Write:
See page 144. _Reset:
TRIM7
1
TRIM6
0
TRIM5
0
TRIM4
0
TRIM3
0
TRIM2
0
TRIM1
0
TRIM0
0
ICG Divider Control ^Read:
DDIV3 DDIV2 DDIV1 DDIV0
$0039
Register (ICGDVR) Write:
See page 144. _{Reset: 0}
0
0
0
U
U
U
U
$003A
ICG DCO Stage Control ^Read:
Register (ICGDSR) Write:
See page 145. _Reset:
DSTG7
R
U
DSTG6
R
U
DSTG5
R
U
DSTG4
R
U
DSTG3
R
U
DSTG2
R
U
DSTG1
R
U
DSTG0
R
U
= Unimplemented R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 9)
Technical Data
54
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Memory Map
MOTOROLA