MC68HC908GT16 Datasheet, PDF (52/412 Pages) Motorola, Inc – Microcontrollers

Memory Map
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Configuration Register 2 Read:
$001E
(CONFIG2)^†
See page 148.
Write:
R
Reset: 0
0
EXT- EXT- EXT-
XTALEN SLOW CLKEN
0
0
0
0
0
OSCEN-
INSTOP
R
0
0
0
$001F
Configuration Register 1 ^Read:
(CONFIG1)^† Write:
See page 148. _Reset:
COPRS
0
LVISTOP LVIRSTD LVIPWRD LVI5OR3^†
0
0
0
0
SSREC
0
STOP
0
COPD
0
†_{One-time writable register after each reset, except LVI5OR3 bit. LVI5OR3 bit is only reset via POR (power-on reset).}
Timer 1 Status and Control ^{Read: TOF}
$0020
Register (T1SC) Write: 0
See page 371. _{Reset: 0}
$0021
Timer 1 Counter ^Read:
Register High (T1CNTH) Write:
See page 374. _Reset:
Bit 15
0
Timer 1 Counter ^{Read: Bit 7}
$0022 Register Low (T1CNTL) Write:
See page 374. _{Reset: 0}
Timer 1 Counter Modulo ^Read:
$0023 Register High (T1MODH) Write:
See page 375. _Reset:
Bit 15
1
Timer 1 Counter Modulo ^Read: _{Bit 7}
$0024 Register Low (T1MODL) Write:
See page 375. _{Reset: 1}
Timer 1 Channel 0 Status Read:
$0025
and Control Register
(T1SC0)
Write:
See page 376. Reset:
CH0F
0
0
$0026
Timer 1 Channel 0 ^Read:
Register High (T1CH0H) Write:
See page 380. _Reset:
Bit 15
0
0
TOIE TSTOP
TRST
0
1
0
0
14
13
12
11
PS2
PS1
0
0
10
9
0
0
0
0
0
0
6
5
4
3
2
1
0
0
0
0
0
0
14
13
12
11
10
9
1
1
1
1
1
1
6
5
4
3
2
1
1
1
1
1
1
1
CH0IE MS0B MS0A ELS0B ELS0A TOV0
0
0
0
0
0
0
14
13
12
11
10
9
Indeterminate after reset
= Unimplemented R = Reserved
U = Unaffected
PS0
0
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 9)
Technical Data
52
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
Memory Map
MOTOROLA