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MC68HC908GT16 Datasheet, PDF (46/412 Pages) Motorola, Inc – Microcontrollers | |||
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Memory Map
2.4 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on MCU
operation. In the Figure 2-1 and in register figures in this document,
reserved locations are marked with the word Reserved or with the
letter R.
2.5 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area
of $0000â$003F. Additional I/O registers have these addresses:
⢠$FE00; SIM break status register, SBSR
⢠$FE01; SIM reset status register, SRSR
⢠$FE02; reserved, SUBAR
⢠$FE03; SIM break flag control register, SBFCR
⢠$FE04; interrupt status register 1, INT1
⢠$FE05; interrupt status register 2, INT2
⢠$FE06; interrupt status register 3, INT3
⢠$FE07; reserved
⢠$FE08; FLASH control register, FLCR
⢠$FE09; break address register high, BRKH
⢠$FE0A; break address register low, BRKL
⢠$FE0B; break status and control register, BRKSCR
⢠$FE0C; LVI status register, LVISR
⢠$FF7E; FLASH block protect register, FLBPR
⢠$FF80; ICG user trim register 5V ICGTR5
⢠$FF81; ICG user trim register 3V ICGTR3
⢠$FFFF; COP control register, COPCTL
Data registers are shown in Figure 2-2. Table 2-1 is a list of vector
locations.
Technical Data
46
MC68HC908GT16 ⢠MC68HC908GT8 â Rev. 2
Memory Map
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