MC68HC908GT16 Datasheet, PDF (323/412 Pages) Motorola, Inc – Microcontrollers

Serial Peripheral Interface Module (SPI)
Pin Name Conventions
20.4 Pin Name Conventions
The text that follows describes the SPI. The SPI I/O pin names are SS
(slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI
(master out slave in), and MISO (master in/slave out). The SPI shares
four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in Table 20-1. The generic
pin names appear in the text that follows.
Table 20-1. Pin Name Conventions
SPI Generic
Pin Names:
MISO
MOSI
SS
Full SPI
Pin Names:
SPI
PTD1/KBD1
PTD2/KBD2
PTD0/KB
D0
SPSCK
PTD3/KBD3
CGND
V_SS
20.5 Functional Description
Figure 20-1 summarizes the SPI I/O registers and Figure 20-2 shows
the structure of the SPI module.
Addr.
$0010
$0011
$0012
Register Name
Bit 7
6
5
4
3
2
Read:
SPI Control Register
(SPCR) Write:
See page 345.
Reset:
SPRIE
0
DMAS
SPMSTR CPOL
0
1
0
CPHA SPWOM
1
0
Read:
SPI Status and Control
Register (SPSCR) Write:
See page 347.
Reset:
SPRF
0
ERRIE
0
OVRF
0
MODF
0
SPTE
MODFEN
1
0
Read: R7
R6
R5
R4
R3
R2
SPI Data Register
(SPDR) Write: T7
T6
T5
T4
T3
T2
See page 350.
Reset:
Unaffected by reset
= Unimplemented
1
SPE
0
SPR1
0
R1
T1
Figure 20-1. SPI I/O Register Summary
Bit 0
SPTIE
0
SPR0
0
R0
T0
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Serial Peripheral Interface Module (SPI)
Technical Data
323