MC68HC908GT16 Datasheet, PDF (123/412 Pages) Motorola, Inc – Microcontrollers

Internal Clock Generator (ICG) Module
Functional Description
7.4.5 Clock Selection Circuit
The clock selection circuit, shown in Figure 7-7, contains two clock
switches which generate the oscillator output clock (CGMXCLK) and the
timebase clock (TBMCLK) from either the internal clock (ICLK) or the
external clock (ECLK). The COP clock (COPCLK) is identical to
TBMCLK. The clock selection circuit also contains a divide-by-two circuit
which creates the clock generator output clock (CGMOUT), which
generates the bus clocks.
CS
ICLK
ECLK
IOFF
EOFF
RESET
V_SS
ECGON
SELECT
OUTPUT
ICLK
ECLK
SYNCHRONIZING
DIV2
IOFF
CLOCK
EOFF
SWITCHER
FORCE_I
FORCE_E
SELECT
OUTPUT
ICLK
ECLK
IOFF
EOFF
SYNCHRONIZING
CLOCK
SWITCHER
FORCE_I
FORCE_E
CGMXCLK
CGMOUT
TBMCLK
COPCLK
NAME
NAME
CONFIG2 REGISTER BIT
TOP LEVEL SIGNAL
NAME
NAME
REGISTER BIT
MODULE SIGNAL
Figure 7-7. Clock Selection Circuit Block Diagram
MC68HC908GT16 • MC68HC908GT8 — Rev. 2
MOTOROLA
Internal Clock Generator (ICG) Module
Technical Data
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