MC68HC908AS32A Datasheet, PDF (99/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

OSC1
CGMRDV
CGMRCLK
V_DDA CGMXFC
CLOCK
SELECT
÷2
CIRCUIT
BCS
V_SS
VRS7–VRS4
PHASE
DETECTOR
LOCK
DETECTOR
LOOP
FILTER
VOLTAGE
CONTROLLED
OSCILLATOR
PLL ANALOG
BANDWIDTH
CONTROL
INTERRUPT
CONTROL
Functional Description
CGMXCLK
A
CGMOUT
B _S*
*When S = 1,
CGMOUT = B
PTC3
MONITOR MODE
USER MODE
CGMINT
LOCK
AUTO ACQ
MUL7–MUL4
PLLIE PLLF
CGMVDV
FREQUENCY
DIVIDER
CGMVCLK
Figure 5-2. CGM Block Diagram
5.3.1 Crystal Oscillator Circuit
The crystal oscillator circuit consists of an inverting amplifier and an external crystal. The OSC1 pin is the
input to the amplifier and the OSC2 pin is the output. The SIMOSCEN signal enables the crystal oscillator
circuit.
The CGMXCLK signal is the output of the crystal oscillator circuit and runs at a rate equal to the crystal
frequency. CGMXCLK is then buffered to produce CGMRCLK, the PLL reference clock.
CGMXCLK can be used by other modules which require precise timing for operation. The duty cycle of
CGMXCLK is not guaranteed to be 50% and depends on external factors, including the crystal and related
external components.
An externally generated clock also can feed the OSC1 pin of the crystal oscillator circuit. Connect the
external clock to the OSC1 pin and let the OSC2 pin float.
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
99