MC68HC908AS32A Datasheet, PDF (4/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
Date
September,
2005
May,
2006
Revision
Level
1.0
2.0
Description
Reformatted to meet new publications guidelines.
Modules updated with additional data
1.4.16 BDLC Receive Pin (BDRxD) — Corrected name of BDLC receive pin
to BDRxD.
Removed Keyboard Interface Module
Removed Timer Interface Module B
Removed all references to TIMB and TBCLK
Figure 1-3. 64-Pin QFP Assignments (Top View) — Added pin assignment
diagram for the 64-pin QFP.
Figure 2-2. I/O Data, Status and Control Registers — Corrected two register
entries:
SPI Status and Control Register (SPSCR)
FLASH Control Register (FLCR)
Chapter 20 Ordering Information and Mechanical Specifications — Added
information pertaining to the 64-pin quad flag pack (QFP).
Page
Number(s)
Throughout
25
N/A
N/A
23
32
38
271
MC68HC908AS32A Data Sheet, Rev. 2.0
4
Freescale Semiconductor