MC68HC908AS32A Datasheet, PDF (37/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Vector Addresses and Priority
Addr.
$FE00
$FE01
$FE02
Register Name
Bit 7
6
5
4
3
SIM Break Status Register ^Read:
R
R
R
R
R
(SBSR) Write:
See page 202. _Reset:
Note: Writing a 0 clears BW
SIM Reset Status Register ^{Read: POR}
PIN
COP
ILOP
ILAD
(SRSR) Write:
See page 202. _{Reset: 1}
0
0
0
0
Reserved
R
R
R
R
R
2
1
Bit 0
BW
R
R
See note
0
0
LVI
0
0
0
0
R
R
R
SIM Break Flag Control Register ^Read: _BCFE
R
R
R
R
R
R
$FE03
(SBFCR) Write:
See page 203. _{Reset: 0}
Configuration Write-Once
Read:
EEDIVCLK
R
R
R
AS32A
R
R
$FE09
Register (CONFIG2) Write:
See page 117. _{Reset: 0}
0
0
1
1
0
0
Break Address Register High ^Read: _{Bit 15}
14
13
12
11
10
9
$FE0C
(BRKH) Write:
See page 248. _{Reset: 0}
0
0
0
0
0
0
Break Address Register Low ^Read: _{Bit 7}
6
5
4
3
2
1
$FE0D
(BRKL) Write:
See page 248. _{Reset: 0}
0
0
0
0
0
0
Break Status and Control ^Read: _BRKE
BRKA
0
0
0
0
0
$FE0E
Register (BRKSCR) Write:
See page 248. _{Reset: 0}
0
0
0
0
0
0
$FE0F
LVI Status Register ^{Read: LVIOUT}
0
0
0
0
0
0
(LVISR) Write:
See page 142. _{Reset: 0}
0
0
0
0
0
0
$FE10
EEDIV High Nonvolatile ^Read:
Register (EEDIVHNVR) ^Write:
See page 48. _Reset:
EEDIV
SECD
EEDIV10 EEDIV9
Unaffected by reset; $FF when blank
$FE11
EEDIV Low Nonvolatile
Register (EEDIVLNVR)
Read:
Write:
EEDIV7
See page 48. _Reset:
EEDIV6
EEDIV5 EEDIV4 EEDIV3 EEDIV2
Unaffected by reset; $FF when blank
EEDIV1
$FE1A
EEDIV Timebase Divider High ^Read:
Register (EEDIVH) ^Write:
See page 48. _Reset:
EEDIV
SECD
EEDIV10 EEDIV9
Contents of EEDIVHNVR ($FE10), Bits [6:3] = 0
$FE1B
EEDIV Timebase Divider Low
Register (EEDIVL)
Read:
Write:
EEDIV7
See page 49. _Reset:
EEDIV6
EEDIV5 EEDIV4 EEDIV3 EEDIV2
Contents of EEDIVLNVR ($FE11)
EEDIV1
= Unimplemented
R = Reserved
Figure 2-3. Additional Status and Control Registers (Sheet 1 of 2)
R
R
0
Bit 8
0
Bit 0
0
0
0
0
0
EEDIV8
EEDIV0
EEDIV8
EEDIV0
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
37