MC68HC908AS32A Datasheet, PDF (48/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
2.8.2.3 EEPROM Nonvolatile Register
The contents of this register is loaded into the EEPROM array configuration register (EEACR) after a
reset. This register is erased and programmed in the same way as an EEPROM byte. (See 2.8.2.1
EEPROM Control Register for individual bit descriptions).
Address: $FE1C
Bit 7
6
5
4
3
2
1
Read:
UNUSED UNUSED UNUSED EEPRTCT EEBP3
Write:
EEBP2
EEBP1
Reset:
PV
PV = Programmed value or 1 in the erased state.
Figure 2-6. EEPROM Nonvolatile Register (EENVR)
Bit 0
EEBP0
NOTE
The EENVR will leave the factory programmed with $F0 such that the full
array is available and unprotected.
2.8.2.4 EEPROM Timebase Divider Register
The 16-bit EEPROM timebase divider register consists of two 8-bit registers: EEDIVH and EEDIVL. The
11-bit value in this register is used to configure the timebase divider circuit to obtain the 35 µs timebase
for EEPROM control. These two read/write registers are respectively loaded with the contents of the
EEPROM timebase divider nonvolatile registers (EEDIVHNVR and EEDIVLNVR) after a reset.
Address:
Read:
Write:
Reset:
$FE1A
Bit 7
EEDIV
SECD
6
5
4
3
2
0
0
0
0
EEDIV10
Contents of EEDIVHNVR ($FE10), Bits [6:3] = 0
= Unimplemented
1
EEDIV9
Bit 0
EEDIV8
Figure 2-7. EEDIV Divider High Register (EEDIVH)
Address: $FE1B
Bit 7
6
5
4
3
2
1
Read:
EEDIV7
Write:
EEDIV6
EEDIV5
EEDIV4
EEDIV3 EEDIV2 EEDIV1
Reset:
Contents of EEDIVLNVR ($FE11)
Figure 2-8. EEDIV Divider Low Register (EEDIVL)
Bit 0
EEDIV0
EEDIVSECD — EEPROM Divider Security Disable
This bit enables/disables the security feature of the EEDIV registers. When EEDIV security feature is
enabled, the state of the registers EEDIVH and EEDIVL are locked (including EEDIVSECD bit). The
EEDIVHNVR and EEDIVLNVR nonvolatile memory registers are also protected from being
erased/programmed.
1 = EEDIV security feature disabled
0 = EEDIV security feature enabled
MC68HC908AS32A Data Sheet, Rev. 2.0
48
Freescale Semiconductor