MC68HC908AS32A Datasheet, PDF (155/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

13.4 Port C
Port C is an 5-bit general-purpose bidirectional I/O port.
Port C
13.4.1 Port C Data Register
The port C data register contains a data latch for each of the five port C pins.
Address: $0002
Bit 7
6
Read: 0
0
Write:
5
4
3
2
1
Bit 0
0
PTC4
PTC3
PTC2
PTC1
PTC0
Reset:
Alternative Functions:
= Unimplemented
Unaffected by reset
MCLK
Figure 13-7. Port C Data Register (PTC)
PTC[4:0] — Port C Data Bits
These read/write bits are software-programmable. Data direction of each port C pin is under the control
of the corresponding bit in data direction register C. Reset has no effect on PTC[4:0].
MCLK — System Clock Bit
The system clock is driven out of PTC2 when enabled by MCLKEN bit in PTCDDR7.
13.4.2 Data Direction Register C
Data direction register C determines whether each port C pin is an input or an output. Writing a 1 to a
DDRC bit enables the output buffer for the corresponding port C pin; a 0 disables the output buffer.
Address: $0006
Bit 7
6
Read:
0
MCLKEN
Write:
5
4
3
2
1
Bit 0
0
DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 13-8. Data Direction Register C (DDRC)
MCLKEN — MCLK Enable Bit
This read/write bit enables MCLK to be an output signal on PTC2. MCLK is the same frquency as the
bus clock. If MCLK is enabled, DDRC2 has no effect. Reset clears this bit.
1 = MCLK output enabled
0 = MCLK output disabled
DDRC[4:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears DDRC[4:0], configuring all port C pins
as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
155