MC68HC908AS32A Datasheet, PDF (263/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

5.0 Vdc ± 0.5 V Serial Peripheral Interface (SPI) Timing
19.8 5.0 Vdc ± 0.5 V Serial Peripheral Interface (SPI) Timing
Num⁽¹⁾
Characteristic⁽²⁾
Symbol
Min
Max Unit
Operating frequency⁽³⁾
Master
Slave
f_BUS(M)
f_BUS(S)
f_BUS/128
dc
f_BUS/2
f_BUS
MHz
Cycle time
1
Master
Slave
2 Enable lead time
3 Enable lag time
t_cyc(M)
t_cyc(S)
t_Lead
t_Lag
2
128
t_cyc
1
—
15
—
ns
15
—
ns
Clock (SCK) high time
4
Master
Slave
t_W(SCKH)M
100
—
ns
t_W(SCKH)S
50
—
Clock (SCK) low time
5
Master
Slave
t_W(SCKL)M
100
—
ns
t_W(SCKL)S
50
—
Data setup time (inputs)
6
Master
Slave
t_SU(M)
t_SU(S)
45
—
ns
5
—
Data hold time (inputs)
7
Master
Slave
Access time, slave⁽⁴⁾
8
CPHA = 0
CPHA = 1
9 Slave disable time (hold time to high-impedance state)
Enable edge lead time to data valid⁽⁵⁾
10
Master
Slave
t_H(M)
t_H(S)
t_A(CP0)
t_A(CP1)
t_DIS
t_EV(M)
t_EV(S)
0
—
ns
15
—
0
40
ns
0
20
—
25
ns
—
10
ns
—
40
Data hold time (outputs, after enable edge)
11
Master
Slave
12
Data valid
Master (before capture edge)
13
Data hold time (outputs)
Master (before capture edge)
t_HO(M)
t_HO(S)
t_V(M)
t_HO(M)
0
—
ns
5
—
90
—
ns
100
—
ns
1. Item numbers refer to dimensions in Figure 19-1 and Figure 19-2.
2. All timing is shown with respect to 30% V_DD and 70% V_DD, unless otherwise noted; assumes 100 pF load on all SPI pins.
3. f_Bus = the currently active bus frequency for the microcontroller.
4. Time to data active from high-impedance state.
5. With 100 pF on all SPI pins.
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
263