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MC68HC908AS32A Datasheet, PDF (33/280 Pages) Freescale Semiconductor, Inc – Microcontrollers
Addr.
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Vector Addresses and Priority
Register Name
SCI Control Register 1 Read:
(SCC1) Write:
See page 178. Reset:
SCI Control Register 2 Read:
(SCC2) Write:
See page 180. Reset:
SCI Control Register 3 Read:
(SCC3) Write:
See page 182. Reset:
SCI Status Register 1 Read:
(SCS1) Write:
See page 183. Reset:
SCI Status Register 2 Read:
(SCS2) Write:
See page 185. Reset:
SCI Data Register Read:
(SCDR) Write:
See page 186. Reset:
SCI Baud Rate Register Read:
(SCBR) Write:
See page 186. Reset:
IRQ Status/Control Register Read:
(ISCR) Write:
See page 139. Reset:
Reserved
Bit 7
LOOPS
0
SCTIE
0
R8
U
SCTE
1
0
0
R7
T7
0
0
0
0
R
6
ENSCI
0
TCIE
0
T8
U
TC
1
0
0
R6
T6
0
0
0
0
R
5
TXINV
0
SCRIE
0
R
0
SCRF
0
0
0
R5
T5
SCP1
0
0
0
R
4
3
M
WAKE
0
0
ILIE
TE
0
0
R
ORIE
0
0
IDLE
OR
0
0
0
0
0
0
R4
R3
T4
T3
Unaffected by reset
0
SCP0
0
0
0
IRQF
0
0
R
R
2
ILTY
0
RE
0
NEIE
0
NF
0
0
0
R2
T2
SCR2
0
0
ACK
0
R
1
PEN
0
RWU
0
FEIE
0
FE
0
BKF
0
R1
T1
SCR1
0
IMASK
0
R
Bit 0
PTY
0
SBK
0
PEIE
0
PE
0
RPF
0
R0
T0
SCR0
0
MODE
0
R
$001C
$001D
$001E
$001F
PLL Control Register Read:
(PCTL) Write:
See page 106. Reset:
PLLIE
0
PLL Bandwidth Control Read:
Register (PBWC) Write:
See page 107. Reset:
AUTO
0
PLL Programming Register Read:
(PPG) Write:
See page 108. Reset:
MUL7
0
Configuration Write-Once Read: LVISTOP
Register (CONFIG1) Write:
See page 115. Reset:
0
PLLF
PLLON
0
1
LOCK
ACQ
0
0
MUL6 MUL5
1
1
R
LVIRST
1
1
= Unimplemented
1
1
1
BCS
0
1
1
1
0
0
0
XLD
0
0
0
0
MUL4 VRS7 VRS6 VRS5
0
0
1
1
LVIPWR SSREC COPL STOP
1
0
0
0
R
= Reserved U = Unaffected
Figure 2-2. I/O Data, Status and Control Registers (Sheet 3 of 6)
1
1
0
0
VRS4
0
COPD
0
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
33