MC68HC908AS32A Datasheet, PDF (36/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
$003A
$003B
$003C
$003D
$003E
$003F
$0040
↓
$004A
Register Name
ADC Input Clock Register ^Read:
(ADICLK) Write:
See page 65. _Reset:
BDLC Analog and Roundtrip ^Read:
Delay Register (BARD) Write:
See page 85. _Reset:
BDLC Control Register 1 ^Read:
(BCR1) Write:
See page 86. _Reset:
BDLC Control Register 2 ^Read:
(BCR2) Write:
See page 88. _Reset:
BDLC State Vector Register ^Read:
(BSVR) Write:
See page 92. _Reset:
BDLC Data Register ^Read:
(BDR) Write:
See page 94. _Reset:
Bit 7
ADIV2
0
ATE
1
IMSG
1
ALOOP
1
0
R
0
BD7
6
ADIV1
0
RXPOL
1
CLKS
1
DLOOP
1
0
R
0
BD6
5
ADIV0
0
0
R
0
R1
1
RX4XE
0
I3
R
0
BD5
4
3
0
ADICLK
0
0
0
BO3
R
0
0
0
R0
R
0
0
NBFS TEOD
0
0
I2
I1
R
R
0
0
BD4
BD3
Unaffected by reset
Reserved
R
R
R
R
R
2
1
Bit 0
0
0
0
0
BO2
1
0
R
0
TSIFR
0
I0
R
0
BD2
0
0
BO1
BO0
1
1
IE
WCM
0
0
TMIFR1 TMIFR0
0
0
0
0
R
R
0
0
BD1
BD0
R
R
R
$004B
$004C
$004D
$004E
$004F
PIT Status and Control ^Read:
Register (PSC) Write:
See page 147. _Reset:
PIT Counter Register High ^Read:
(PCNTH) Write:
See page 148. _Reset:
PIT Counter Register Low ^Read:
(PCNTL) Write:
See page 148. _Reset:
PIT Counter Modulo Register ^Read:
High (PMODH) Write:
See page 149. _Reset:
PIT Counter Modulo Register ^Read:
Low (PMODL) Write:
See page 149. _Reset:
POF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
POIE PSTOP
0
1
14
13
0
0
6
5
0
0
14
13
1
1
6
5
1
1
= Unimplemented
0
0
PPS2 PPS1
PRST
0
0
0
0
12
11
10
9
0
0
0
0
4
3
2
1
0
0
0
0
12
11
10
9
1
1
1
1
4
3
2
1
1
1
1
1
R
= Reserved U = Unaffected
Figure 2-2. I/O Data, Status and Control Registers (Sheet 6 of 6)
PPS0
0
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
MC68HC908AS32A Data Sheet, Rev. 2.0
36
Freescale Semiconductor