MC68HC908AS32A Datasheet, PDF (50/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
2.8.3 Low-Power Modes
The WAIT and STOP instructions can put the MCU in low power-consumption standby modes.
2.8.3.1 Wait Mode
The WAIT instruction does not affect the EEPROM. It is possible to start the program or erase sequence
on the EEPROM and put the MCU in wait mode.
2.8.3.2 Stop Mode
The STOP instruction reduces the EEPROM power consumption to a minimum. The STOP instruction
should not be executed while a programming or erasing sequence is in progress.
If stop mode is entered while EELAT and EEPGM are set, the programming sequence will be stopped
and the programming voltage to the EEPROM array removed. The programming sequence will be
restarted after leaving stop mode; access to the EEPROM is only possible after the programming
sequence has completed.
If stop mode is entered while EELAT and EEPGM is cleared, the programming sequence will be
terminated abruptly.
In either case, the data integrity of the EEPROM is not guaranteed.
2.9 FLASH Memory (FLASH)
This subsection describes the operation of the embedded FLASH memory. This memory can be read,
programmed, and erased from a single external supply. The program and erase operations are enabled
through the use of an internal charge pump.
The FLASH memory is an array of 32,256 bytes with one byte of block protection and an additional 38
bytes of user vectors. An erased bit reads as a 1 and a programmed bit reads as a 0.
Memory in the FLASH array is organized into rows within pages. There are two rows of memory per page
with 64 bytes per row. The minimum erase block size is a single page,128 bytes. Programming is
performed on a per-row basis, 64 bytes at a time. Program and erase operations are facilitated through
control bits in the FLASH control register (FLCR). Details for these operations appear later. The FLASH
memory map consists of:
• $8000–$FDFF — user memory (32,256 bytes)
• $FF80 — FLASH block protect register (FLBPR)
• $FF88 — FLASH control register (FLCR)
• $FFCC–$FFFF — these locations are reserved for user-defined interrupt and reset vectors
Programming tools are available from Freescale. Contact your local Freescale representative for more
information.
NOTE
A security feature prevents viewing of the FLASH contents.⁽¹⁾
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
unauthorized users.
MC68HC908AS32A Data Sheet, Rev. 2.0
50
Freescale Semiconductor