MC68HC908AS32A Datasheet, PDF (117/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7
Configuration Register (CONFIG2)
7.1 Introduction
This section describes the configuration register (CONFIG2). This register contains bits that configures
the device to either the MC68HC08AZxx emulator or the MC68HC08ASxx emulator
7.2 Functional Description
The configuration register is a write-once register. Out of reset, the configuration register will read the
default. Once the register is written, further writes will have no effect until a reset occurs.
Address: $FE09
Bit 7
6
5
Read:
EEDIVCLK R
R
Write:
Reset: 0
0
0
R
= Reserved
4
3
2
R
AS32A
R
1
1
0
1
Bit 0
R
R
0
0
Figure 7-1. Configuration Register (CONFIG2)
EEDIVCLK — EEPROM Timebase Divider Clock Select Bit
This bit selects the reference clock source for the EEPROM timebase divider module.
1 = EExDIV clock input is driven by internal bus clock
0 = EExDIV clock input is driven by CGMXCLK
AS32A— Device Indicator Bit
This bit is used to distinguish MC68HC908AS32A from older non-A suffix versions.
1 = A version
0 = Non-A version
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
117