MC68HC908AS32A Datasheet, PDF (73/280 Pages) Freescale Semiconductor, Inc – Microcontrollers

BDLC MUX Interface
For example, if the frequency of the MUX interface clock (f_BDLC) is 1.0486 MHz, then the period (t_BDLC)
is 954 ns and the maximum filter delay in the absence of noise will be 15.259 µs.
The effect of random noise on the BDRxD signal depends on the characteristics of the noise itself. Narrow
noise pulses on the BDRxD signal will be ignored completely if they are shorter than the filter delay. This
provides a degree of low-pass filtering.
If noise occurs during a symbol transition, the detection of that transition can be delayed by an amount
equal to the length of the noise burst. This is just a reflection of the uncertainty of where the transition is
truly occurring within the noise.
Noise pulses that are wider than the filter delay, but narrower than the shortest allowable symbol length,
will be detected by the next stage of the BDLC’s receiver as an invalid symbol.
Noise pulses that are longer than the shortest allowable symbol length will be detected normally as an
invalid symbol or as invalid data when the frame’s CRC is checked.
4.4.2 J1850 Frame Format
All messages transmitted on the J1850 bus are structured using the format shown in Figure 4-6. J1850
states that each message has a maximum length of 101 PWM bit times or 12 VPW bytes, excluding SOF,
EOD, NB, and EOF, with each byte transmitted MSB first.
All VPW symbol lengths in the following descriptions are typical values at a 10.4 kbps bit rate.
IDLE SOF
DATA
PRIORITY
(DATA0)
MESSAGE ID
(DATA1)
DATA_N
E
OPTIONAL
CRC
ON
DB
IFR
I
F
EOF _S IDLE
Figure 4-6. J1850 Bus Message Format (VPW)
SOF — Start-of-Frame Symbol
All messages transmitted onto the J1850 bus must begin with a long-active 200-µs period SOF symbol.
This indicates the start of a new message transmission. The SOF symbol is not used in the CRC
calculation.
Data — In-Message Data Bytes
The data bytes contained in the message include the message priority/type, message ID byte (typically
the physical address of the responder), and any actual data being transmitted to the receiving node.
The message format used by the BDLC is similar to the 3-byte consolidated header message format
outlined by the SAE J1850 document. See SAE J1850 — Class B Data Communications Network
Interface for more information about 1- and 3-byte headers.
Messages transmitted by the BDLC onto the J1850 bus must contain at least one data byte and,
therefore, can be as short as one data byte and one CRC byte. Each data byte in the message is eight
bits in length and is transmitted MSB to LSB.
CRC — Cyclical Redundancy Check Byte
This byte is used by the receiver(s) of each message to determine if any errors have occurred during
the transmission of the message. The BDLC calculates the CRC byte and appends it onto any
messages transmitted onto the J1850 bus. It also performs CRC detection on any messages it
receives from the J1850 bus.
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
73